The Dislocation-Free Ingot
Jan Czochralski's Accidental Pen Dip and the Dash Necking Bottleneck
Every microprocessor on Earth sits on a circular slice of elemental silicon less than a millimeter thick. Although silicon is smelted from ordinary quartz sand ($\text{SiO}_2$), metallurgical silicon cooled in a mold solidifies as a polycrystalline chunk—a patchwork of millions of tiny crystal grains oriented at random angles. Along every boundary where two crystal grains meet, dangling atomic bonds trap moving electrons and create electrical short circuits. Building billions of nanometer-scale transistors on a wafer requires the entire 300-millimeter disk to be one continuous, uninterrupted diamond-cubic crystal lattice from edge to edge.
The method that grows every modern silicon ingot began with a laboratory mistake during World War I. In 1916, at the AEG metals laboratory in Berlin, Polish chemist Jan Czochralski was measuring the solidification rates of melted metals while taking notes by hand. Distracted at his bench, Czochralski accidentally dipped his steel fountain pen nib into a crucible of molten tin instead of his inkwell. Pulling his pen upward, he saw a thin silver wire of solidified tin hanging from the slit of the nib.
Instead of throwing the wire away, Czochralski etched its surface with acid and examined it under a microscope. He discovered that the entire metallic filament was a single continuous crystal. As the metal cooled at the liquid-solid meniscus just above the melt bath, tin atoms locked onto the existing crystal lattice of the rising thread rather than nucleating random new grains. Publishing his paper in August 1918, Czochralski used his capillary crystal-pulling frame to measure the crystallization velocities of tin, lead, and zinc.
For thirty years, Czochralski's technique remained an obscure metallurgical curiosity. When John Bardeen, Walter Brattain, and William Shockley invented the transistor at Bell Telephone Laboratories in December 1947, most physicists worked with polycrystalline slabs of germanium. Only Bell Labs chemist Gordon Teal insisted that reliable semiconductors demanded large single crystals. Working in Murray Hill, New Jersey, with engineer John Little between 1948 and 1950, Teal built a gas-shielded Czochralski puller that dipped a seed crystal into molten germanium and rotated it upward. Moving to Texas Instruments in 1953, Teal mastered pulling single-crystal silicon from a quartz crucible at $1,420^\circ\text{C}$ and unveiled the first commercial silicon transistor in May 1954.
Even in Teal's pulled crystals, however, thousands of line defects called dislocations threaded down every ingot. Whenever the cooler solid silicon seed crystal touched the $1,420^\circ\text{C}$ molten silicon bath, thermal shock warped the crystal planes at the contact face. Those slipped planes propagated downward into the growing ingot as continuous dislocation lines, trapping metal impurities and leaking current across transistor junctions.
In 1958, physicist William C. Dash at the General Electric Research Laboratory in Schenectady, New York, eliminated every dislocation with a geometric maneuver inside the furnace. Dash observed through infrared microscopy that crystal dislocations in diamond-cubic silicon do not run straight down the vertical pulling axis. Instead, they glide along oblique $\{111\}$ crystallographic planes tilted at an angle to the growth direction.
To exploit that tilt, Dash dipped his seed crystal into the $1,420^\circ\text{C}$ melt and immediately sped up the vertical pulling motor. Pulling rapidly narrowed the growing crystal down to a slender stem—the Dash neck—barely three millimeters in diameter. As the narrow neck grew for several centimeters, every tilted dislocation line generated by thermal shock glided diagonally outward until it hit the outer wall of the neck and terminated. Once the bottom of the neck was free of defects, Dash slowed the pull rate to flare the crystal outward into a massive boule refined to $99.9999999\text{ percent}$ ("nine-nines") purity. Every modern 300-millimeter silicon wafer supporting billions of nanometer-scale transistors still hangs during crystal growth from a three-millimeter Dash neck that guides every thermal-shock dislocation out to the ingot wall.